Logs on 2023-02-25 (liberachat/#haskell)
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| 00:39:26 | <ph88> | i am trying to debug this code https://github.com/scrive/pool/blob/0a05714739fc533c9840a8a5cb8bdd07ead57800/src/Data/Pool/Internal.hs#L210-L231 i put trace statements all over https://bpa.st/BYGP4 i don't see it going into the if/else branch .. what else can i do to figure out why the code hangs ? |
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| 00:49:32 | <geekosaur> | check the value of `pools`? |
| 00:49:57 | <geekosaur> | also be aware that `trace` and `traceM` don't happen at the same time so mixing them can produce weird results |
| 00:50:35 | <geekosaur> | but from the existing trace I'd say either evaluating `pools` itself or `sizeofSmallArray pools` is hanging for some reason |
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| 01:13:13 | <ph88> | geekosaur, i tried to refine it more .. https://bpa.st/QURP2 it hangs when i want to Show these types |
| 01:14:26 | <geekosaur[m]> | Sounds like they're circularly defined? But I'm on my way to bed |
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| 01:18:53 | <ph88> | geekosaur[m], good night :) |
| 01:18:59 | <[Leary]> | ph88: I would shift my attention to whatever code is constructing the `Pool a` you're examining; that seems to be where the bottom is. |
| 01:21:07 | <ph88> | [Leary], that is a smart comment :) |
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| 05:57:37 | <man_max> | I need to download a paper from springer proceeding. Do you have an access to download from springer? |
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| 06:57:08 | <Inst> | yeah, i'm not sure if this is intended behavior with cabal |
| 06:57:25 | <Inst> | apparently, if you use --lib with any package, say, Acme.Dont, you now have a config file, at least on Windows |
| 06:57:36 | <Inst> | further non --lib uses of cabal install will install hidden to that config file |
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| 07:01:50 | <Inst> | posted to cabal |
| 07:01:53 | <Inst> | issues on github |
| 07:04:02 | <Inst> | btw, i finally figured out how to teach / learn an idiom of Haskell in 1 week, but it's pretty horrifying, anyone interested? |
| 07:04:12 | <zephyr__> | Inst: Sure! |
| 07:04:20 | <Inst> | put everything in main |
| 07:04:30 | <Inst> | IORef / MVar / TVar |
| 07:04:41 | <Inst> | fix to emulate a while loop, for to emulate a for loop |
| 07:05:13 | <Inst> | i tried this idiom a bit, as a Pythonic translation of a Python program into Haskell, and it was horrifying / disgusting |
| 07:05:26 | <Inst> | but I think anyone can pick up this idiom in the same amount of time they might need to get a minimal grasp of any other language |
| 07:06:32 | <zephyr__> | Inst: I see. |
| 07:06:39 | <Inst> | it's sort of like curing cancer by shooting the patient |
| 07:06:57 | <Inst> | but hey, it's technically doable, we can technically say Haskell can be learned in 1 week, for some definition of Haskell |
| 07:08:21 | <zephyr__> | Inst: True. |
| 07:14:01 | <Inst> | there is actually a different question of how many "productive" Haskell idioms there are |
| 07:14:28 | <Inst> | I think the "everything in main, IORef, simulated while / for" is probably the minimum possible productive Haskell idiom |
| 07:14:57 | <Inst> | there's Simple Haskell on top of that, and probably a range of useful / "true" Haskell idioms between "not really Haskell" and Simple Haskell |
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| 09:06:19 | <maerwald[m]> | I think you need 6 weeks for basic haskell |
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| 11:15:53 | <[exa]> | Inst: actually that's a pretty reasonable way |
| 11:16:13 | <[exa]> | `fix` is a bit of overkill but we have `whileM` right. :D |
| 11:17:24 | <[exa]> | the only thing the people need to resolve there to get moreless productive (with problems they can reasonably solve) is explaining that 1] return actually doesn't return 2] when to use <- vs when to use let .. = |
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| 11:18:13 | <Inst> | also the most important thing to explain is NEVER ACTUALLY CODE IN THIS f- IDIOM |
| 11:18:23 | <Inst> | it's disgusting! |
| 11:19:08 | <[exa]> | you can't judge, they will still like it |
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| 11:19:20 | <Inst> | what i've heard is that if you try to teach the explosives to learners |
| 11:19:22 | <[exa]> | the disgust comes with knowing how to do stuff better |
| 11:19:26 | <Inst> | and to an extent, people like knowing that mutability exists |
| 11:19:33 | <Inst> | it'll just roll of their backs |
| 11:19:42 | <Inst> | they're not interested, they understand that Haskell is for functional programming |
| 11:20:28 | <Inst> | in my experience, they don't actually want to know mutrefs, if they have accumulating parameters, it's enough |
| 11:21:13 | <Inst> | if you teach them unsafePerformIO, they'll be like: "well, this is unsafe, isn't it?" |
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| 11:23:35 | <[exa]> | yeah |
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| 11:26:11 | <Inst> | whileM requires IO Bool, which is suboptimal |
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| 11:26:23 | <Inst> | untilM is better if you want it |
| 11:26:50 | <Inst> | oh god what, no one cloned the until semantics |
| 11:27:15 | <Inst> | fix is great, though, because it gives you an opportunity to introduce recursion and laziness, as in, how the hell does x = f x workS/ |
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| 11:38:49 | <zephyr__> | Inst: Perl has had `until` for long. |
| 11:40:39 | <mc47> | Hi folks! I'm trying to model a smart refresh system of values that only get recalculated when their dependencies change. They type that I came up with is basically { compute :: Context -> a, dependencies :: Set Dependency} |
| 11:41:28 | <mc47> | The applicative instance is straightforward (merge the dependencies), but I don't think there's a reasonable way to implement a monad instance |
| 11:41:40 | <mc47> | Right? Just wanted to check my intuition |
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| 12:13:15 | <[Leary]> | mc47: Sounds like Incremental Computing. This is a matter of ongoing research where even the state of the art approaches (e.g. Adapton) are honestly not great; I don't recommend sinking time into your own design unless it's for fun. |
| 12:14:13 | <geekosaur> | sounds like a spreadsheet to me 🙂 |
| 12:14:40 | <[Leary]> | Yeah, spreadsheets are a classic usecase for IC. |
| 12:17:54 | <mc47> | I didn't expect this to be a matter of ongoing research... Thanks for the pointer [Leary] |
| 12:17:58 | <mc47> | [Leary]: Huh, interesting. I mean I have an applicative-based design that works for my purposes. The "bottom" computation nodes are their own dependencies, computations are composed with <*>. |
| 12:19:47 | <mc47> | However, the refresh logic is ad-hoc: I create a map from dependencies to final computations, and trigger a refresh when the dependencies change |
| 12:20:10 | <mc47> | geekosaur: very similar to a spreadsheet ;) trying to replace them actually |
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| 12:22:01 | <Franciman> | hi mc47, maybe you can get some ideas from FRP |
| 12:22:28 | <Franciman> | or from virtual dom technologies in react and the likes which compute the minimal set of changes to propagate |
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| 12:24:46 | <mc47> | Thanks for the pointer Franciman |
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| 12:26:57 | <Franciman> | i'm not sure, but i think that implementing a monad instance means losing static control over what happens at the previous stages of your refresh system |
| 12:27:32 | <Franciman> | so you can't be sure what >>= will pass over, and could end up solving an halting problem? Not sure, again :P |
| 12:30:24 | <[Leary]> | mc47: This <https://gist.github.com/LSLeary/da963da122946d981b4b143cbcf3dd73> is a small Haskell implementation based on Magnus Carlsson's functional pearl on the topic, with further inspiration from the Adapton paper. Perhaps it (or details contained within) will be of use to you, though I can't guarantee performance or usability. |
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| 12:33:22 | <mc47> | Franciman: that's exactly my intuition. I can't know what >>= will give me back until I run it, which means it's not particularly useful. |
| 12:33:56 | <Franciman> | arrows could help a bit in preprocessing things |
| 12:34:59 | <mc47> | [Leary] that was quick! Thanks a lot, I'll definitely check it out. I don't care about performance or usability at this point since what I've written fulfills the requirements (and is in TypeScript...). I was just curious and intrigued by the problem |
| 12:35:53 | <[Leary]> | Note that `Adaptive` in this implementation /does/ have Monad. The necessary trick is to observe dependencies as they're used and update deps/revdeps accordingly. |
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| 12:42:37 | <mc47> | I guess I have some reading to do :D |
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| 12:54:29 | <[exa]> | mc47: this sounds a bit like propagators, but these are more like for constraint solving and managing uncertainty |
| 12:57:39 | <mc47> | [exa]: thanks for another pointer :D :D |
| 12:59:38 | <[exa]> | mc47: I literally saw some pretty reasonable slides a few days ago, more related to prolog actually |
| 13:00:41 | <[exa]> | but yeah it's more for constraint solvers where you don't really know how many constraints are going to get spawned |
| 13:01:09 | <[exa]> | in your case I guess any topology-conserving update scheme will do |
| 13:02:33 | <[exa]> | btw IIRC there's some super-cool super-complicated online algorithm for quickly detecting new strongly connected components (aka uncomputable cycles) after dependency graph updates (the benefit is that you don't need to run the whole the scc everytime again), that might help I guess |
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| 13:03:46 | <mc47> | Yes, I think what I've written will be enough for the next two or three years, and any improvement will be more on the "software-engineery" side |
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| 13:04:10 | <mc47> | All of this is for my own enjoyment :D I like thinking about these problems |
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| 14:43:57 | <ph88> | does someone recognize this kind of code ? https://bpa.st/DPGZ2 i suspect it used to work on GHC release 9.0.2 but no longer works on ghc 9.2.6 |
| 14:44:39 | <ph88> | This is taken from here https://github.com/biocad/hasbolt-extras/blob/master/src/Database/Bolt/Extras/DSL/Typed/Instances.hs#L89-L90 |
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| 14:48:00 | <jtza8> | I've spent an afternoon comming to the conclusion that what I thought should be a sum type, ends up being two very different types, in that there don't seem to be any significant functions that would be defined for both of them. Is this a usual part of the Haskell learning experience? (Or was I just being thick?) |
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| 14:49:08 | <geekosaur> | ph88, that looks like missing `PolyKinds` |
| 14:49:41 | <geekosaur> | jtza8, designing types rationally is part of learning, yes |
| 14:50:01 | <geekosaur> | the rules you'd follow for other languages don't necessarily work here |
| 14:50:34 | <jtza8> | It was a good learning experience though. Still too much OOP in me. |
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| 14:56:20 | <ph88> | geekosaur, i added PolyKinds also i forgot to post second error https://bpa.st/V6GRU |
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| 14:59:16 | <geekosaur> | more context helps. they're explicitly of kind `Type` so can't be of kind `'Bool` |
| 14:59:43 | <geekosaur> | unless this code was misusing `Type` from back before `NoStarIsType` |
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| 15:00:48 | <ph88> | geekosaur, i also don't know (not my library) .. i will comment out the Assert then for the moment |
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| 15:09:53 | <Guest2517> | Hey everyone! I'm new to Haskell and open-source but quite excited about Summer of Haskell! I might be a bit late but can anyone direct me to how to get started? |
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| 15:11:43 | <hpc> | https://www.haskell.org/get-started/ |
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| 15:12:18 | <hpc> | ^ is a nice easy way to get set up |
| 15:13:53 | <geekosaur> | ph88, actually I misread that and can't tell for certain because the definition of Assert is missing, but ghc is very certain that it should have kind Type in both those places. which looks wrong, so I wonder if Assert is misdeclared or itself is in a module without PolyKinds (but that too seems weird, seems like it should be explicitly Bool not polymorphic) |
| 15:14:05 | <geekosaur> | but without being able to see Assert I can't tell for certain |
| 15:14:37 | <ph88> | geekosaur, i think the definition of Assert is here https://hackage.haskell.org/package/base-4.17.0.0/docs/GHC-TypeError.html#t:Assert |
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| 15:16:39 | <geekosaur> | okay, maybe its type changed at some point, because that definition indeed doesn't match the usage |
| 15:17:11 | <[Leary]> | It doesn't match the error either. |
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| 15:23:46 | <geekosaur> | true, the error says `Type` but base's `Assert` wants a `TypeError` |
| 15:24:03 | <geekosaur> | and a `Bool` matches neither |
| 15:24:18 | <geekosaur> | (promoted) |
| 15:25:46 | <eldritchcookie[m> | i want to get all the exports of a module with template haskell currently the only way to do that is to parse the module, assuming i were able to modify the template haskell package to support this would i need to pass this by a GHC proposal or something similar ? |
| 15:27:34 | <geekosaur> | hypothetically you have an already parsed AST if you are doing things like e.g. Data.QuickCheck.All does |
| 15:28:15 | <geekosaur> | I have a nasty suspicion that traversing that AST is either difficult or wildly incompatible between ghc versions at that point, though |
| 15:31:08 | <eldritchcookie[m> | quickchecksallProperties is defined as... (full message at <https://libera.ems.host/_matrix/media/v3/download/libera.chat/343b3015b91dfc56754b2a6afe10f658793816c6>) |
| 15:32:31 | <geekosaur> | yes, but it's parsing to get names and then querying the AST for their definitions |
| 15:32:44 | <geekosaur> | you should be able to walk the AST if you can query it |
| 15:34:27 | <eldritchcookie[m> | yeah but GHC obvously has the names of all the exports of a module i should just have to ask not reparse again |
| 15:34:39 | <geekosaur> | exactly |
| 15:35:00 | <geekosaur> | which is why I suspect there's an additional complication somewhere |
| 15:36:17 | <geekosaur> | like, I know there was a major chaneg when the AST was redone with TTG |
| 15:36:45 | <geekosaur> | but that should be long since over and you shouldn't need to worry about pre-TTG versions of ghc |
| 15:37:57 | <geekosaur> | anothyer big change when everything became Located bvut again you shouldn't need to worry at this point |
| 15:38:17 | <geekosaur> | so I womder what else might be changing between versions to make this hard |
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| 15:40:11 | <eldritchcookie[m> | wait qReifyModule is defined as |
| 15:40:11 | <eldritchcookie[m> | ```haskell |
| 15:40:11 | <eldritchcookie[m> | instance Quasi Q where |
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| 15:40:52 | <eldritchcookie[m> | qReifyModule = reifyModule |
| 15:41:15 | <eldritchcookie[m> | reifyModule :: Module -> Q ModuleInfo |
| 15:41:15 | <eldritchcookie[m> | reifyModule m = Q (qReifyModule m) |
| 15:41:22 | <eldritchcookie[m> | the hell? |
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| 15:41:47 | <eldritchcookie[m> | is reifyModule a Primop ? |
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| 15:47:55 | <geekosaur> | no, I think you're confusing a top level definition that came from the compiler guts with an instance definition for Q |
| 15:49:01 | <geekosaur> | also it has occurred to me that QuickCheck is old enough to have lived through all the AST changes I mentioned, so they went with something simple and dependable, then everyone else copied them because it worked |
| 15:49:31 | <geekosaur> | and for anything more direct you'll have to (a) ask in #ghc (b) hope the AST doesn't go through another major change |
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| 15:53:02 | <geekosaur> | iirc there are two Q instances: one for IO, one for pure. some things are stubbed out in the pure version |
| 15:53:57 | <ph88> | Could anyone help me to figure out why my program hangs when i call `show` on a value ? https://bpa.st/PFBFQ |
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| 15:55:12 | <ph88> | actually let me make a new paste .. |
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| 15:55:34 | × | gentauro quits (~gentauro@user/gentauro) (Read error: Connection reset by peer) |
| 15:55:42 | <geekosaur> | missing Connection definition |
| 15:55:47 | <geekosaur> | can't tell |
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| 15:55:57 | <geekosaur> | everything else about pipe looks okay |
| 15:56:46 | <eldritchcookie[m> | the ConnectionWithTimeout doesn't call show on Connection so it shouldn't matter |
| 15:56:56 | <ph88> | geekosaur, thanks for looking, i'll try to debug it as far as i can. Maybe in a bit i have a better example |
| 15:57:26 | <hpc> | what happens if you show only specific parts of the value? |
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| 15:58:18 | <hpc> | also what happens if you don't show, but just evaluate? |
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| 16:02:59 | <segfaultfizzbuzz> | i was considering trying to learn to understand assembly so i looked up the riscv specification expecting it to be simple, and my eyes were watering after a few pages. is there a simple and complete ISA which is worth learning? i was eyeing the 6502... |
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| 16:03:57 | <geekosaur> | z80? |
| 16:04:32 | <geekosaur> | 6502 is simple-ish but a bit strange, like various things assuming page 2 ($0200-$02ff) is stack |
| 16:04:52 | <hpc> | the ben eater youtube channel makes a computer out of breadboard stuff, and it includes making its own instruction set |
| 16:04:58 | <geekosaur> | (and god help you if you overflow it) |
| 16:05:06 | <segfaultfizzbuzz> | yeah i meant to clarify, i would be looking for "simple and sufficiently modern",... i don't want to chase ideas which are no longer relevant |
| 16:05:08 | <hpc> | it's beyond minimal, but you get to see all the logic that goes into it |
| 16:05:21 | <hpc> | and how it turns into microcode, how that microcode gets executed, etc |
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| 16:05:57 | <geekosaur> | z80's still pretty relevant, it's used for embedded stuff still |
| 16:06:17 | <geekosaur> | and it's modern enough that x86 took stuff from it |
| 16:06:40 | <segfaultfizzbuzz> | ok i guess i will look at the z80 then |
| 16:06:50 | <segfaultfizzbuzz> | hopefully the ISA is less than 50 pages...? |
| 16:06:57 | <geekosaur> | yes |
| 16:07:22 | <segfaultfizzbuzz> | i don't understand how people can keep these multi-hundred page documents in their heads, let alone understand how stuff on one page interacts with stuff on another |
| 16:07:41 | <geekosaur> | it's even smaller if you get a reference that doesn't split out instructions that are really the same thing but with register bits split out for some weird reason like the first z80 asm reference I owned |
| 16:08:17 | <ph88> | geekosaur, i found it eventually ... i created bottom by calling functions recursively in ReaderT implementation. Thanks for having a look on the paste |
| 16:08:25 | <segfaultfizzbuzz> | i guess there is no toy minimalist ISA? |
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| 16:13:53 | <segfaultfizzbuzz> | haha this advertisement for the z80 says it has a "instruction speed of 1.6 microseconds" |
| 16:14:50 | <geekosaur> | I didn't say it was fast |
| 16:15:15 | <geekosaur> | although I think there are 4MHz versions these days (the original was 1MHz) |
| 16:15:35 | <segfaultfizzbuzz> | i am looking at the registers, and this has an 8 bit accumulator and a 16 bit accumulator... this is already needlessly complicated |
| 16:15:44 | <geekosaur> | the simple architectures are all dead |
| 16:16:17 | <segfaultfizzbuzz> | so if i try to simplify the registers here: https://en.wikipedia.org/wiki/Zilog_Z80 |
| 16:16:23 | <geekosaur> | AF BC DE HL |
| 16:17:07 | <darkling> | If you're looking for something simple, ARM2/ARM3 is great. |
| 16:18:14 | <darkling> | RiscOS (available for the Raspberry Pi) even has an assembler built into its BASIC. |
| 16:20:35 | <segfaultfizzbuzz> | do the z80 registers define the complete state of the CPU? or is there state elsewhere? |
| 16:21:19 | <geekosaur> | complete state if you include the flags register which is paired with the 8-bit accumulator |
| 16:21:20 | <darkling> | There's other state, but that's not generally accessible or even particularly helpful. |
| 16:21:45 | <geekosaur> | (there's a PUSH AF instruction) |
| 16:21:56 | <segfaultfizzbuzz> | geekosaur: yeah if you see the wikipedia entry, the "status" register is listed, which has the CPU flags |
| 16:22:28 | <geekosaur> | I'm not looking at wikipedia, I'm remembering form when I spent a couple years doing z80 assembly |
| 16:22:48 | <darkling> | There's also IX and IY for the offset instructions, and a purely internal I that holds the current instructions. |
| 16:23:06 | <segfaultfizzbuzz> | can i ignore the distinction between main and alternate registers? |
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| 16:23:13 | <geekosaur> | z80 is an upgraded Intel 8080 that made it a true 8/16 bit CPU instead of an 8-bit CPU with a glorified 16 bit register |
| 16:23:24 | <darkling> | Oh, and a complete set of shadow registers that you can swap for the current ones with the EXX instruction. |
| 16:23:45 | <segfaultfizzbuzz> | darkling: ok so wikipedia doesn't list these "shadow" registers then? |
| 16:23:59 | <segfaultfizzbuzz> | darkling: oh the "alternate" registers are the "shadow" registers |
| 16:24:10 | <geekosaur> | that's the "alternate" regs you were talking about |
| 16:24:13 | <darkling> | Yaeh, I 've rpobably used the wrong name for them. |
| 16:24:27 | <darkling> | Hmm. My typing's terrible today. |
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| 16:25:51 | <segfaultfizzbuzz> | i don't think i understand the index registers |
| 16:26:43 | <segfaultfizzbuzz> | i guess the instructions, perhaps for physical logic design reasons, restrict which registers operations can read from or write to? |
| 16:27:05 | <darkling> | Where you can do an operation with (HL) (i.e. read data from the address pointed to by HL), you can also do that operation with (IX+n) or (IY+n) |
| 16:27:13 | <segfaultfizzbuzz> | "The index registers, IX and IY, were intended as flexible 16-bit pointers, enhancing the ability to manipulate memory, stack frames and data structures." |
| 16:27:34 | <darkling> | They're a lot slower, because it's got to read the n value from the byte after the opcode, and there's a prefix, and it's got to do the addition. |
| 16:28:37 | <darkling> | Imagine you've got a data structure with several elements in it. You can point to the start of the structure with IX, and then access all the elements of the structure as (IX+n), without having to manually add and subtract on the pointer. |
| 16:28:43 | <int-e> | segfaultfizzbuzz: You could use them as the base of a C struct, with direct addressing mode for fields (within ~128 bytes either way) |
| 16:29:38 | <segfaultfizzbuzz> | so IX/IY about not having to do lots of loads and adds, basically--increase memory locality |
| 16:29:52 | <segfaultfizzbuzz> | but it is an optimization rather than something "fundamental" |
| 16:30:01 | <int-e> | nobody cared about memory locality at that time |
| 16:30:08 | <segfaultfizzbuzz> | haha ok |
| 16:30:10 | <int-e> | there were no caches |
| 16:30:46 | <darkling> | It's not even much of an optimisation -- the instructions are large (3-4 bytes, IIRC) and slow (21 clock cycles). |
| 16:30:49 | <int-e> | But RAM was also rather fast if you measured access speed in clock cycles. |
| 16:30:58 | <segfaultfizzbuzz> | https://clrhome.org/table/ ay this is too much |
| 16:31:22 | <darkling> | To be fair, that's writing out all of the combinations of all the instructions. |
| 16:31:33 | <int-e> | Not 100s of cycles to access RAM when all caches are missed which is the reality now. |
| 16:31:42 | <segfaultfizzbuzz> | are (opcode, register) pairs restricted? |
| 16:31:45 | <darkling> | It's a bit simpler if you just look at the types of instructions (but still pretty complicated). |
| 16:32:15 | <darkling> | This is a reasonable reference: https://wiki.specnext.dev/Extended_Z80_instruction_set |
| 16:32:45 | <darkling> | (It's got some extra instructions that the original Z80 never had, but those are noted) |
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| 16:33:59 | <int-e> | so plenty of special purpose registers |
| 16:34:04 | <segfaultfizzbuzz> | does the z80 "reduce" the state every cycle? that is to say, can an instruction from the past have a delayed effect? |
| 16:34:20 | <geekosaur> | nope |
| 16:34:39 | <geekosaur> | it predates caches, delay slots, and the like |
| 16:34:40 | <segfaultfizzbuzz> | so the z80 state at t+1 is strictly determined by the opcode, and there is only one opcode |
| 16:34:41 | <int-e> | maybe, with external hardware ;) |
| 16:35:39 | <darkling> | I'd still recommend ARM instead of Z80. For example: https://www.chiark.greenend.org.uk/~theom/riscos/docs/ARM3-datasheet_ARM-Family-Data-Manual-VLSI.pdf |
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| 16:36:10 | <segfaultfizzbuzz> | so i am looking at the LD part of this specnext website--i see things like LD HL nn, LD IXY nn, etc-- so this means that there are restrictions on how the LD instruction can pair with registers (and more generally this applies to other opcodes as well)? |
| 16:36:11 | <darkling> | The list of instructions is on page 1-11, and the full description of the instructions is from 3-13 onwards. |
| 16:36:41 | <darkling> | (Up to 3-43) |
| 16:37:13 | <darkling> | The rest you don't really need to know. |
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| 16:37:55 | <darkling> | It's a much more orthogonal design than the Z80, so you don't need to worry about restrictions on which registers can be used together in which instructions. |
| 16:38:21 | <darkling> | (Having 32 bits per instruction makes it much easier to do that than the Z80's 8 bits per instruction). |
| 16:38:39 | <geekosaur> | yeh, I didn't claim Z80 was well designed. was better than the 8080 though |
| 16:38:45 | <int-e> | segfaultfizzbuzz: Yes there are some restrictions like that. Though in this case, there's also an instruction for loading BC/DE/HL/SP; the difference is that the IXY one is slower. |
| 16:38:46 | <darkling> | :) |
| 16:39:14 | <geekosaur> | then the 8085 stole stuff from it, then the 8086/8088 stole more, but still not really orthogonal (and still not enough registers…) |
| 16:40:38 | <int-e> | I think orthogonality only really took root when we started using compilers for peformance critical code. |
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| 16:41:00 | <darkling> | I think the 6502 ISA was fairly nicely orthogonal. I don't know a huge amount about it, though. |
| 16:41:02 | <int-e> | Because register allocation is hard enough even when they're all interchangeable. |
| 16:41:32 | <int-e> | I may be looking at this through an x86 lens though. |
| 16:41:43 | <geekosaur> | there was little to know about it. A, X, Y regs (and a stack pointer that was 8 bits because the top bits were wired to $02) |
| 16:42:17 | <geekosaur> | pages 0, 1, 2 were special (although I forget was special about $01 now) |
| 16:43:10 | <geekosaur> | oh, and X and Y weren't very orthogonal really, either to A or each other |
| 16:43:25 | <geekosaur> | weirdass addressing modes |
| 16:44:07 | <darkling> | Wasn't there an addressing mode that allowed you treat the first 256 bytes of RAM effectively as registers? |
| 16:44:09 | <geekosaur> | maybe you're thinking 6800 (A, B, X)? |
| 16:44:37 | <darkling> | No, I've never looked at the 6800/680x0 family. |
| 16:45:50 | <darkling> | Mostly old ARMs and Z80 and a little bit of x86, and I've read some docs on Connection Machines, the Transputer, and the PDP8. |
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| 16:46:32 | <segfaultfizzbuzz> | darkling: i think here i would ask again about the full state of the CPU--i suppose this is an ARM2 cpu? |
| 16:46:46 | <geekosaur> | "In order to make up somewhat for the lack of registers, the 6502 included a zero-page addressing mode that uses one address byte in the instruction instead of the two needed to address the full 64 KB of memory. This provides fast access to the first 256 bytes of RAM by using shorter instructions." |
| 16:46:47 | <darkling> | The thing I linked to was the ARM3. Very similar, though. |
| 16:46:51 | <segfaultfizzbuzz> | so R0 through R15 define the full state? |
| 16:47:00 | <darkling> | segfaultfizzbuzz: Yes. |
| 16:47:06 | <geekosaur> | like I said, first 3 pages were special |
| 16:47:07 | <darkling> | geekosaur: That's the thing I was thinking of. |
| 16:47:22 | <geekosaur> | I think $01 was used for indexing? |
| 16:47:25 | <int-e> | geekosaur: Looks like page 1 is/was for stack. page 2 is for memory-mapped IO? |
| 16:47:39 | <geekosaur> | mm, maybe I'm misremembering |
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| 16:48:00 | <geekosaur> | yeh, looks like $01 not $02 |
| 16:48:04 | <segfaultfizzbuzz> | darkling: and again like the z80, cpu state at clock t+1 is determined entirely by the opcode from clock t ? |
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| 16:48:29 | <darkling> | Yes. |
| 16:49:13 | <segfaultfizzbuzz> | lol "high level constructs like for, while, and proc" |
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| 16:49:35 | <int-e> | Well, there's external factors... RAM (if you're reading from memory) or interrupts... |
| 16:49:56 | <int-e> | segfaultfizzbuzz: what's so funny about that |
| 16:50:01 | <int-e> | :) |
| 16:50:36 | <geekosaur> | welcome to 1970 |
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| 16:51:08 | <segfaultfizzbuzz> | int-e: but RAM can only touch CPU state via the load instruction, i think (?) |
| 16:51:23 | <segfaultfizzbuzz> | interrupts i definitely do not understand |
| 16:52:09 | <darkling> | Interrupts are basically "something outside the CPU wants attention". There's usually a special line on the hardware that you change to tell the CPU about that, |
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| 16:53:02 | <darkling> | and then it'll usually do something like push the current PC onto the stack and jump to a special location, where you can put code that works out what the request was and what to do about it. |
| 16:53:15 | <int-e> | And the CPU will save a bit of state (the instruction pointer as the bare minimum) and transfer control to an interrupt service routine (often at a fixed address those days) |
| 16:53:43 | <int-e> | . o O ( stereo ) |
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| 16:53:48 | <darkling> | On the early ARMs, it replaced about half the registers with a special set, put the original PC into LR and jumped to 0x08 (I think). |
| 16:54:40 | <int-e> | oh yeah you can have a shadow register set just for interrupt handling |
| 16:54:45 | <int-e> | as a way of preserving state |
| 16:54:50 | <darkling> | Then you return from IRQ mode by copying LR back to PC (which on the ARM 2 & ARM 3 would also set the CPU flags, changing the mode from IRQ back to the original USR) |
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| 16:56:34 | <darkling> | Most of the time, you don't need to know about interrupts, unless you're writing an operating system. |
| 16:56:57 | <darkling> | (Or something that interacts with the hardware outside the CPU/RAM system) |
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| 16:58:00 | <segfaultfizzbuzz> | location always refers to RAM, and special location means a specific RAM address? |
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| 16:58:46 | <darkling> | Well, a specific instruction, which on most modern machines is RAM, yes. |
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| 16:59:52 | <darkling> | On the ZX Spectrum, for example, the first 8KiB of the address space was ROM, and the rest (8KiB or 48 KiB, depending onthe machine) was RAM. |
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| 17:02:36 | <darkling> | On the Acorn Archimedes (ARM-based), the ROM with the OS in it was mapped into the address space a bit higher, and the first page of address space was RAM (usually full of interrupt-handling code) |
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| 17:11:03 | <cdsmith> | Anyone have a quick example of using GHC Generics with a container (of kind Type -> Type)? |
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| 17:14:16 | <ph88> | when i Show a bytestring how should i interpret something like this ? "\179\DLE\208x" are those escaping backslashes ? |
| 17:15:41 | <[exa]> | yeah these are likely non-ascii bytes |
| 17:16:10 | <[exa]> | if you're sure the bytestring should contain eg. utf8, it's best to decode it and show as normal string/text |
| 17:17:59 | <ph88> | [exa], it's actually binary data ... perhaps there is a handy function to encode it to hex ? 00 FF 01 etc |
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| 17:19:34 | <monochrom> | You can unpack to get [Word8]. Then its show gives you decimal numbers. |
| 17:20:22 | <[exa]> | `base16` package could help too |
| 17:21:41 | <[exa]> | ah wait there's https://hackage.haskell.org/package/bytestring-0.11.4.0/docs/Data-ByteString-Builder.html#v:byteStringHex |
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| 20:28:18 | <Artem[m]> | Is there a way to get a list of identifiers imported by the current module from some other one? I want to clean up imports a bit, and many modules in the project import Foo while Foo is simply a bunch of reexports from Foo.Bar, Foo.Baz, etc. I wont to replace imports of Foo to more fine grained imports of Foo.Bar etc. For that I need to know what Foo-identifiers are in use, then I can see which of Foo.Bars i need to import |
| 20:28:18 | <Artem[m]> | instead of Foo. |
| 20:31:48 | <geekosaur> | if you don't have an import list and it's not qualified then -Wmissing-import-lists will tell you all the identifiers so imported |
| 20:32:13 | <geekosaur> | I don't think you can get it if you have it imported qualified. (the opposite case is an error) |
| 20:34:02 | <c_wraith> | should HLS have that sort of functionality? It's clearly related to jump-to-definition |
| 20:34:17 | <geekosaur> | HLS does and the warning I cited is where it gets it |
| 20:36:40 | <geekosaur> | hm, I guess "error" is overspeaking a bit, no qualification and import list means the import list must be complete or you get undefined symbol errors |
| 20:36:49 | <mauke> | can't you just remove the import and see which identifiers become errors? |
| 20:37:00 | <geekosaur> | or that, yes |
| 20:38:46 | <geekosaur> | what you can't tell is which of the imports in the other module it came from, because that information is completely lost when re-exported |
| 20:39:31 | <mauke> | you can't have everything. (where would you put it?) |
| 20:39:35 | <geekosaur> | (some of that is because it's difficult to get the linker to handle it, but also consider how `import … as X` interacts) |
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| 21:05:11 | <Artem[m]> | brilliant, thanks everyone for the suggestions |
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| 21:06:12 | <Artem[m]> | yeah, attributing those identifiers to the more specific modules was a bonus point, but I didn't count on it... |
| 21:08:34 | <Artem[m]> | and yes, I'm told HLS has something called "refine imports" that does exactly that. I wish I could use HLS superpowers in scripts... |
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| 21:55:53 | <sm> | me too |
| 21:57:35 | <segfaultfizzbuzz> | if i have a pure function which maps say, 8 bytes to 8 bytes, is it true that such a function can require more than 8 bytes of memory (during execution, if it is allowed to mutate the input memory), or can the function always be restricted to never use more than the input? |
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| 21:58:51 | <segfaultfizzbuzz> | i feel like *requiring more than 8 bytes |
| 21:59:13 | <segfaultfizzbuzz> | during the intermediary computation would violate the pidgeonhole principle |
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| 22:02:29 | <mauke> | does code count as memory? |
| 22:02:36 | <segfaultfizzbuzz> | no code is free |
| 22:03:09 | <segfaultfizzbuzz> | and it's pure so there is no IO or other weird stuff |
| 22:03:39 | <mauke> | if input == 0 then ... else if input == 1 then ... else if input == 2 then ... |
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| 22:05:20 | <segfaultfizzbuzz> | ay one day i will write a formal definition of a "non-intrinsic pathological counterexample"... so in this case, |
| 22:06:06 | <segfaultfizzbuzz> | maybe i can fix the definition by saying that the code cannot be "enormous" in size, or maybe i can say that the code cannot branch |
| 22:07:33 | <monochrom> | Or perhaps investigate the trade off between code size and space cost. |
| 22:08:48 | <mauke> | fromEnum (x == 0) * r0 + fromEnum (x == 1) * r1 + fromEnum (x == 2) * r2 + ... |
| 22:08:50 | <mauke> | branchless |
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| 22:11:26 | <segfaultfizzbuzz> | i think i will go with the defintion here that the function must be branch-free/always execute the same code path |
| 22:11:39 | <segfaultfizzbuzz> | so you can only define a fixed sequence of operations |
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| 22:12:11 | <jackdk> | mauke's example qualifies |
| 22:12:17 | <monochrom> | What is your model of computing anyway? Turing machines? Game of Life? |
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| 22:13:05 | <monochrom> | What you think of as well-defined notions such as "branch free" are actually meaningless unless you first pick a model of computing. |
| 22:13:58 | <monochrom> | For example there is no such thing as "code path" in the two models I mentioned. |
| 22:15:01 | <monochrom> | This is why what I said about trade off between code size and space cost is a much more robust approach. |
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| 22:28:16 | <segfaultfizzbuzz> | hmm so i can't just have a bunch of logic gates...? it's a deterministic mapping so i don't understand what a "model of computing" would be... |
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| 22:32:49 | <monochrom> | Then "a bunch of logic gates" is your model of computing. |
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| 22:33:58 | <monochrom> | "a bunch of logic gates" is also a straightforward translation of both of mauke's programs, one of which you [mis]labelled as "branching". |
| 22:34:29 | <monochrom> | So arguably "a bunch of logic gates but it has to be branch free" is actually self-contradictory. |
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| 22:36:00 | <monochrom> | This is why it's bad idea to do moving goalposts. |
| 22:36:03 | <darkling> | But you don't get recursion or loops with linear logic, so it's a poor model of computing (but practically good enough if your function domain is finite and small enough). |
| 22:36:05 | <segfaultfizzbuzz> | well if i had an addition operation, that isn't considered a branch (i don't think?) but it would use logic gates... |
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| 22:37:58 | <monochrom> | "x==0" is just a comparator (logic gates!). "if then else" is just a two-way demultiplexer (logic gates!). |
| 22:39:07 | <segfaultfizzbuzz> | i think that i understand here: all we care about is the mapping, and so you may as well start off thinking about the *largest* encoding, which would be a complete table from inputs to outputs |
| 22:39:18 | <segfaultfizzbuzz> | and the "model of computing" is merely a practical method for compressing or encoding that table |
| 22:40:00 | <segfaultfizzbuzz> | so if extra memory beyond the 8 bytes turns out to be useful for making a more compact representation of the table, then it is useful |
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| 22:41:54 | <segfaultfizzbuzz> | i don't want to do moving goalposts, the issue is that my original question overlooked the fact that the code can be of arbitrary size and therefore encode a lookup table for the results |
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| 22:46:11 | <[exa]> | segfaultfizzbuzz: btw the closest distinction to your original problem that I recall are the limited turing machines, they have a nice spot in chomsky hierarchy capturing type-1 languages |
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| 22:46:56 | <monochrom> | Is that the one about context-sensitive languages? |
| 22:47:07 | <[exa]> | yeah, with the noncontracting grammars |
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| 22:47:49 | <[exa]> | ah nvm they pingtimeouted |
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| 22:50:48 | <monochrom> | I bet code size + space code >= log_2 (how many functions from 8 bytes to 8 bytes) |
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| 22:51:16 | <monochrom> | err s/space code/space size/ |
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| 22:52:55 | <[exa]> | I wouldn't like to bet there, you can encode really ugly stuff in these functions |
| 22:52:56 | <monochrom> | No, that flies in the face of constant functions. |
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| 22:54:02 | <[exa]> | like, split the 64 bits to 3 pieces, compute ackermann function on that, and return the first 64 bits |
| 22:54:27 | <[exa]> | (or middle 64 bits, so that we're sufficiently evil) |
| 22:56:28 | <[exa]> | with that I guess the full lookup table might be an good, economical option |
| 22:57:02 | <[exa]> | *a |
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| 22:58:37 | <monochrom> | The mid-square method was not a very good PRNG. But perhaps this mid-ack method is better. >:) |
| 22:59:40 | <darkling> | You might need a time machine to ensure a decent throughput. :) |
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| 23:01:49 | <segfaultfizzbuzz> | [exa]: i will look up type-1 languages |
| 23:03:29 | <[exa]> | segfaultfizzbuzz: you seem to have timeouted, they correspond to languages that are matched by non-contracting grammars |
| 23:04:02 | <[exa]> | which is kinda useful distinction, since that nicely describes how all computation should be preferably reducing complexity, not adding it |
| 23:06:12 | <[exa]> | anyway the computability distinction is probably impractical for your scale -- the "language" of functions from 8B to 8B is finite so it's "not even type-3" in the hierarchy, but there might be examples where just implementing it with a lookup table might be the best opinion |
| 23:07:00 | <[exa]> | possible example: 23:54 < [exa]> like, split the 64 bits to 3 pieces, compute ackermann function on that, and return the first 64 bits (or middle 64 bits, so that we're sufficiently evil) |
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| 23:09:11 | <[exa]> | (the lookup in that case is just 128 exabytes, comparatively a bargain!) |
| 23:09:18 | <geekosaur> | gone again |
| 23:09:21 | <[exa]> | I see |
| 23:09:29 | <[exa]> | nvm, they have channel logs. |
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| 23:11:40 | <monochrom> | This is scary Kolmogorov complexity territory. |
| 23:14:55 | <[exa]> | yeah |
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| 23:16:06 | <[exa]> | I know a guy who's got a paper on "probability that a randomly chosen program terminates" and I literally don't understand a tiniest piece of that paper |
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| 23:16:27 | <[exa]> | what's more scary that they got an actual number there |
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| 23:23:07 | <segfaultfizzbuzz> | [exa]: oh interesting, i always wondered how to choose a measure on the space of programs... got a link? |
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| 23:28:43 | <segfaultfizzbuzz> | [exa]: link to "probability that a randomly chosen program terminates" i meant |
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| 23:30:22 | <segfaultfizzbuzz> | [exa]: i think by "limited turing machine" you mean restricted turing machine? |
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